
Why AI's Next Bottleneck Is Memory: Mitesh Agrawal, CEO of Positron AI
The AI infrastructure race has largely been framed as a contest for more compute: bigger GPUs, more chips, and larger data centers. But as AI shifts from training models to running them at scale, a different constraint is emerging. Inference workloads, particularly for frontier models, reasoning models, long context windows, and video generation, depend heavily on how quickly data can move through memory and how much memory each chip can hold. GPUs are exceptional at the math behind training, yet during inference they often use only 30 to 50 percent of their available memory bandwidth. At the same time, data centers are constrained by power, cooling, and supply chain bottlenecks for advanced components like high bandwidth memory. For enterprises and cloud providers spending hundreds of billions of dollars on AI, efficiency per chip, per watt, and per dollar has become a strategic priority. On this episode of The Reboot Chronicles Podcast, we sit down with Mitesh Agrawal, CEO of Positron AI, the inference focused silicon company that has raised more than one billion dollars over the past year, including an 875 million dollar Series C. Mitesh, the former co-founder and CEO of Lambda, explains why memory bandwidth and capacity are becoming the defining constraints of AI inference, how Positron's architecture delivers more than 90 percent memory bandwidth utilization and up to 2.3 terabytes of memory per chip, and why building on commodity memory gives the company a supply chain advantage. He also breaks down the size of the inference market, what is really happening to token costs, and why silicon companies must reboot themselves with every new chip generation.





